The automated sneak circuit analysis is accomplished in three processing phases. The first phase is the data reduction phase. In this phase the "wire list" is generated. Input may be in several different formats and even segmented such that separate groups or contractors may prepare "wire lists" covering subsystems with discontinuities at interfaces. The "wire list" is merged with an inline disconnect table establishing continuity at the interface between any subsystems. This "wire list" is then reduced to an ISAM file containing a branch cross-reference table, in which each to-node/from-node branch is uniquely identified and stored with its associated characteristics. The second phase is the path derivation phase. In this process the data in the branch cross-reference table is used to examine all possible paths to see which meet the above mentioned two-fold criteria for a possible sneak circuit. The third phase is the path regeneration phase. The paths flagged are listed in branch sequence number and then in to-from connector sequence. The output report generated is in a highly usable format that allows the engineer to verify the suspected sneak circuit path by locating the wire segments on the circuit schematic drawings.